IO limitation - Lets talk about it

So i’m new to Chia, started a week ago, played around in WIN GUI to see what works, what doesnt, getting used to the setup etc. I’m now looking to step it up a notch, get linux installed on a spare SSD, see what plotman’s all about then hopefully sit back and watch the plots grow.

I watched a YT vid a few nights ago with Gene/Bram/intel dude etc and whoever was mid/btm of the screen spoke about using 8c rigs (5800x) in his flat and touched on the topic of IO. Seems to get mentioned on the forum and keybase quite often but no real solid info / discussion about it which would probably benefit quite a few of us.

Hoping someone can chime in and lay down some info on what factors affect your max workable IO, how to check if it’s being saturated, limitations imposed by your IO etc etc.

Example hardware wise for myself, 5950x (could theoretically run 24 plots in parallel with 16+32/2 math but dont have the ram to support, 32gb ram (so limited realistically to 8 plots at 3400 / 6 at 4500), 4TB MP510 Gen4 (maybe 10 plots parallel giving 360gb per plot) & 8+ HDD’s available for final plots.

Where does IO come into play / limit the rest of the chain…

You can run 12 in parallel if you drop the ram to 2400.

Also it’s 256GB per plot.

Cool but can you explain IO limitations? Is this due to cpu/mobo/ssd etc? How does it all break down?

Hey man! So from a very high level, IO is like plumbing. You can do two things to increase the “flow” buy a wider pipe (in diameter) or run pipes in parallel (same diameter but increase the quantity) same is true with computers. The CPU (Intel i7 or AMD Ryzen 9, etc) the chipset (motherboard “cpu”) and the peripherals (pcie, pci * back in the day, ram channels/speed, usb, sata, m.2, etc) are all LIMITED by their individual theoretical (in perfect lab conditions) width and speed. Chia plotting is “the ultimate equalizer” because it sets a new exceedingly high bar for bench-marking ALL of these interactions simultaneously - THUS the statements about IO constantly. Those of us who’ve been experimenting for months have become broken records repeating the “GO WIDE, NOT BIG” mantra - because it works!! Build 4 hot rods instead of one freight train IF YOU WANT SPEED.

It would take more than a short reply here to explain all the technical aspects of each of those interfaces, so you’ll have to do some research on your own if you want a more in-depth understanding.

Some topics to explore:
Chiplet vs Monolith
L1 vs L2 vs L3 cache
PCIe gen3 vs gen4
samsung pcie 4 980 pro review

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Cool, some good links. So for monitoring / evaluating if you’re bouncing off your own IO limit based on your own plotter, are we looking at max NVME R/W, RAM R/W bandwidth etc or purely looking at ph1 & total K/s for plotting?

I’m guessing NMVE will be the main limiting factor? If you’ve got high core count (5950x, for example) and enough RAM not to cap plot count, you’re going to be working that NVME pretty hard. Continual plots starting (working off delay), continual copy to HDD etc. Is it the NMVE that will have the highest saturation thus bottlenecking the rest of the system due to hitting max IOPS?

Is that why (sorry, need to watch it again to grab your name!) the guy in the vid settled on 5800x for IO efficiency, as pushing a higher core count would start hitting the IO limit imposed by the rest of the system…